1. Technical Field
The present invention relates to a semiconductor memory apparatus, and more particularly, to a voltage generating circuit of a semiconductor memory apparatus.
2. Related Art
In general semiconductor memory apparatuses, when an active command is input, a bank is activated and the data in the memory cells are transmitted to a sense amplifier through the bit lines. The sense amplifier performs a sensing operation on the transmitted data. In order to accurately and quickly perform the sensing operation, the sense amplifier performs an overdrive operation.
During the sensing operation of the sense amplifier, a voltage stored in the memory cells, i.e., a core voltage, is applied to the bit lines precharged with a bit line precharge voltage and to the bit line bars, and a voltage difference between the bit line and the bit line bar is amplified. When the sensing operation begins, an external voltage is applied to the bit lines for a predetermined amount of time, which is the overdrive operation.
The core voltage is applied to the memory cells. When the core voltage level is higher than a target level, memory cells may become defective. When the core voltage level is lower than the target level, the data may not be appropriately preserved. Therefore, the core voltage needs to maintain a constant level.
The core voltage is generated by a voltage generating circuit provided in the semiconductor memory apparatus. When the core voltage level is increased by the overdrive operation, the voltage generating circuit reduces the core voltage level to the target level by comparing the level of the core voltage with a level of a reference voltage.
The problem with the conventional voltage generating circuits is that when an overdrive operation that is not associated with the generation and adjustment of the core voltage and any other operations are being performed, the voltage generating circuit continues its operation to generate and/or adjust the core voltage. However, his conventional approach increases the power consumption of the semiconductor memory apparatus.